Overview
Main description
Proven 2D and 3D IC lead-free interconnect reliability techniques
Reliability of RoHS-Compliant 2D and 3D IC Interconnects offers tested solutions to reliability problems in lead-free interconnects for PCB assembly, conventional IC packaging, 3D IC packaging, and 3D IC integration. This authoritative guide presents the latest cutting-edge reliability methods and data for electronic manufacturing services (EMS) on second-level interconnects, packaging assembly on first-level interconnects, and 3D IC integration on microbumps and through-silicon-via (TSV) interposers. Design reliable 2D and 3D IC interconnects in RoHS-compliant projects using the detailed information in this practical resource.
Covers reliability of:
- 2D and 3D IC lead-free interconnects
- CCGA, PBGA, WLP, PQFP, flip-chip, lead-free SAC solder joints
- Lead-free (SACX) solder joints
- Low-temperature lead-free (SnBiAg) solder joints
- Solder joints with voids, high strain rate, and high ramp rate
- VCSEL and LED lead-free interconnects
- 3D LED and 3D MEMS with TSVs
- Chip-to-wafer (C2W) bonding and lead-free interconnects
- Wafer-to-wafer (W2W) bonding and lead-free interconnects
- 3D IC chip stacking with low-temperature bonding
- TSV interposers and lead-free interconnects
- Electromigration of lead-free microbumps for 3D IC integration
Table of contents
Ch 1. Introduction to RoHS Compliant Semiconductor and Packaging Technologies; Ch 2. Reliability Engineering of Lead-Free Interconnects; Ch 3. Notes on Failure Criterion; Ch 4. Reliability of 1657-Pin CCGA Lead-Free Solder Joints; Ch 5. Reliability of PBGA Lead-Free Solder Joints (With and Without Underfills); Ch 6. Reliability of LED Lead-Free Interconnects; Ch 7. Reliability of VCSEL Lead-Free Interconnects; Ch 8. Reliability of Low-Temperature Lead-Free (SnBiAg) Solder Joints; Ch 9. Reliability of Lead-Free (SACX) Solder Joints; Ch 10. Chip-to-Wafer (C2W) Bonding and Lead-Free Interconnect Reliability; Ch 11. Wafer-to-Wafer (W2W) Bonding and Lead-Free Interconnect Reliability; Ch 12. Through-Silicon-Via (TSV) Interposer Reliability; Ch 13. Electromigration of Lead-Free Microbumps for 3D IC Integration; Ch 14. Effects of Dwell-Time and Ramp-Rate on SAC Thermal Cycling Test Results; Ch 15. Effects of High Strain Rate (Impact) on SAC Solder Balls/Bumps; Ch 16. Effects of Voids on Solder Joints Reliability; Index
Author comments
John H. Lau, Ph.D., P.E., IEEE Fellow, ASME Fellow, ITRI Fellow, spent 30 years in the electronics industry (HP and Agilent) in Palo Alto, California, and currently serves as a fellow at the Electronics & Optoelectronics Laboratories, Industrial Technology Research Institute (ITRI), Taiwan. He has published 15 books with McGraw-Hill, including Advanced MEMS Packaging, Electronics Manufacturing with Lead-Free Solders and Low Cost Flip Chip Technologies.
